Ryzen 7000X3D CCD Priority Can Be Fine-Grainedly Controlled With AMD AGESA 1.0.0.5C AM5

For its Socket AM5 motherboards, ASUS has started distributing beta UEFI firmware updates that contain AGESA 1.0.0.5 patch-C microcode. This allows end users more control over how the processor divides workload between the two CCDs (CPU complex dies) on 12-core and 16-core Ryzen 7000 series processors, including the future 7000X3D processors, by exposing them to a number of additional options through the UEFI Setup Program.

While AMD is working on updating the Chipset Software to include “3D V-cache Optimization driver” components that bring OS-level awareness of the asymmetric implementation of 3D V-cache on the 7900X3D and 7950X3D where only one of the two CCDs has the additional cache, these firmware-level options let users choose which CCD gets priority for workload. Any OS should benefit from 3D V-cache in the way it was designed (where less parallelized workloads like games are prioritized on the CCD with the 3D V-cache), as the firmware-level optimization is OS-independent.