AMD “Zen 6” ISA Will Include VNNI INT8, AVX512 FP16, and More

Consumers and businesses may now access AMD’s “Zen 6” instruction set manual, which contains new CPU instructions that many have been waiting for. AVX512_BMM, AVX512_FP16, AVX_NE_CONVERT, AVX_IFMA, and AVX_VNNI_INT8 are just a some of the instructions found in the most recent Znver6 ISA handbook. This is especially significant since consumer-oriented desktop CPUs will now be able to do 16-bit AVX-512 computations, enabling developers to effectively speed up AVX-512-based apps and data pathways. With the addition of these instructions, the standard CPU becomes a global base platform, carrying out its intended function with improved observability, according to @FelixCLC_, one of the HPC developers on X.

The new open-source enabling adds AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, and AVX512_FP16 to GCC, which is confirmed by a set of GNU compiler modifications. The intended use cases of these instructions make them especially intriguing. The bit matrix manipulation capabilities of AVX-512 BMM greatly speed up local AI deployments. Users will no longer need to rely on Intel Xeon CPUs for AVX-related development and process acceleration thanks to native FP16 computations and AVX VNNI in INT8 format on desktop computers. More users will benefit from this development throughout the Zen 6-based product line. Since AMD and Intel are now directly competing in AVX development, implementation strategy will determine how the two vary from one another. Additionally, there is growing evidence that Intel’s next-generation “Nova Lake” may bring AVX-512 technology back to desktop computers, indicating that consumer PCs would likely see an increase in sophisticated vector and matrix acceleration.